Pmod ACL 是一個三軸數位加速度計模組,可為主機板提供相應的輸入。用戶可透過 SPI 或 I2C介面與 Analog Devices ADXL345 通訊,指示 Pmod 的定向角度。
- 3軸,±2/4/8/16g 加速度計
- 可自選解析度
- 活動/非活動監控
- 單/雙擊與自由落體檢測
- 適用於各種設計的小型PCB尺寸(2.5cm x 2.0cm)
- SPI 介面與 2x4 pin I²C 介面的 12 pin Pmod連接器
A data stream setting the threshold activity to a value of 250 mg and Interrupt 1 to be triggered whenever
the X and Y axis exceeds the threshold level through SPI is provided below:
Read/~Write | Multi-byte | 6-bit Threshold Activity Address | |||||
---|---|---|---|---|---|---|---|
0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 |
8 bits of Threshold Activity data (62.5 mg/LSB scale) | |||||||
0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
Read/~Write | Multi-byte | 6-bit Activity/Inactivity Control Address | |||||
0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 |
Activity/Inactivity Control Settings | |||||||
ACT ac/dc | ACT X | ACT Y | ACT Z | INACT ac/dc | INACT X | INACT Y | INACT Z |
0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
Read/~Write | Multi-byte | 6-bit Interrupt Enable Address | |||||
0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 |
8 bits of Which Interrupt Sources Are Enabled | |||||||
Data Ready | Single Tap | Double Tap | Activity | Inactivity | Free Fall | Watermark | Overrun |
0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
Pinout Description Table
Pmod Header J1 | Pmod Header J2 | |||||||||
---|---|---|---|---|---|---|---|---|---|---|
Pin | Signal | Description | Pin | Signal | Description | Pin | Signal | Description | ||
1 | ~CS | Chip Select | 7 | INT2 | Interrupt 2 | 1, 5 | SCL | Serial Clock | ||
2 | MOSI | Master-Out-Slave-In | 8 | INT1 | Interrupt 1 | 2, 6 | SDA | Serial Data | ||
3 | MISO | Master-In-Slave-Out | 9 | NC | Not Connected | 3, 7 | GND | Power Supply Ground | ||
4 | SCK | Serial Clock | 10 | NC | Not Connected | 4, 8 | VCC | Positive Power Supply | ||
5 | GND | Power Supply Ground | 11 | GND | Power Supply Ground | |||||
6 | VCC | Power Supply (3.3V) | 12 | VCC | Power Supply (3.3V) |
通訊協議/介面:I²C SPI | |
DIGILENT Pmod Interface Specification類型/版本:TYPE 2A / 1.2.0 |
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產品文件:產品規格│原理圖 │ 資源中心 | |
產品編號:410-097 |
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