Digilent Pmod LVLSHFT是一個內建 Texas Instruments SN47LVC1T45 接收器的數位邏輯電平轉換模組。該模組適用於需要在3.3V CMOS標準的邏輯訊號，但具有備用邏輯電平輸出的使用者。
- 數位邏輯電平轉換器
- 能在兩個使用者提供的電壓電平之間轉換邏輯訊號
- 2×7 pin JTAG 接頭
- 用於控制邏輯層轉換的8個迷你開關
- 支援 1.8~5.5V 電壓
- 適用於各種設計的小型PCB (4.6cm*2.0cm)
- 具有 GPIO 介面的 12 pin Pmod 連接器
- 排針上的插針間距為100 mil。 PCB在與排針上的針平行的側面上長1.75英寸，在與排針垂直的側面上長0.8英寸。
A pinout table for the Pmod LVLSHFT is provided below:
| Pin Descriptions for the Pmod LVLSHFT | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Header J1 | JTAG Header J2 | Header J3 | ||||||||
| Pin | Signal | Description | Pin | Signal | Description | Pin | Signal | Description | ||
| 1 | AIO1/TMS | A1 & TMS JTAG pin | 1 | GND | Power Supply Ground | 1 | BIO1/TMS | B1 & TMS JTAG pin | ||
| 2 | AIO2/TDI | A2 & TDI JTAG pin | 2 | VCCB | Power Supply side B | 2 | BIO5/SRST | B5 & Signal Reset pin | ||
| 3 | AIO3/TDO | A3 & TDO JTAG pin | 3 | GND | Power Supply Ground | 3 | BIO2/TDI | B2 & TDI JTAG pin | ||
| 4 | AIO4/TCK | A4 & TCK JTAG pin | 4 | BIO1/TMS | B1 & TMS JTAG pin | 4 | BIO6 | I/O pin B6 | ||
| 5 | GND | Power Supply Ground | 5 | GND | Power Supply Ground | 5 | BIO3/TDO | B3 & TDO JTAG pin | ||
| 6 | VCCA | Power Supply side A | 6 | BIO4/TCK | B4 & TCK JTAG pin | 6 | BIO7 | I/O pin B7 | ||
| 7 | AIO5 | I/O pin A5 | 7 | GND | Power Supply Ground | 7 | BIO4/TCK | B4 & TCK JTAG pin | ||
| 8 | AIO6 | I/O pin A6 | 8 | BIO3/TDO | B3 & TDO JTAG pin | 8 | BIO8 | I/O pin B8 | ||
| 9 | AIO7 | I/O pin A7 | 9 | GND | Power Supply Ground | Header J4 | ||||
| 10 | AIO8 | I/O pin A8 | 10 | BIO2/TDI | B2 & TDI JTAG pin | Pin | Signal | Description | ||
| 11 | GND | Power Supply Ground | 11 | GND | Power Supply Ground | 1 | VCCB | Power Supply side B | ||
| 12 | VCCA | Power Supply side A | 12 | (NC) | Not Connected | 2 | GND | Power Supply Ground | ||
| 13 | GND | Power Supply Ground | ||||||||
| 14 | SRST | Signal Reset | ||||||||
Note* Headers J2 and J3 follow the JTAG pin numbering convention as opposed to the Pmod header numbering convention.
Any external power applied to the Pmod LVLSHFT must be within 1.8V and 5.5V.
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通訊協議/介面：GPIO |
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DIGILENT Pmod Interface Specification類型/版本：1.2.0 |
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產品文件：產品規格│原理圖 │ 資源中心 |
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產品編號：410-320 |
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