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LXD11K4 │16 位元低延遲寬頻 ADC │ MIMO 波束成形 雷達 電信系統 航太應用

產品應用

  • MIMO Applications
  • Radar waveform receivers
  • Digital Beam Forming
  • Medical systems
  • Telecommunicaton systems
  • Experimental Physics
  • Analog playback systems
  • Aerospace and test instrumentation
  • Software defined radio (SDR)

4 通道 16 位元 ADC FMC 模組

The LXD11K4 provides four 16-bit A/D channels with up to 310 Msps data rate. All the data interfaces are based on LVCMOS and LVDS signalling. The design is based on the Analog devices AD9652 analog to digital converters.

類比輸入/輸出

Depending on the application requirements it is possible to order the LXD11K4 with either a DC coupled or an AC coupled analog front end. The DC coupled interface is meant for signal acquisitions in the first Nyquist zone while the AC coupled inputs also offers the option for signal acquisition in the second Nyquist zone.

16位元

The ADCs offer 16-bits resolution further contributing to achieve best in class signal to noise ratios.

LVDS 訊號功能

The ADC devices make use of LVDS signaling for their data interfaces. This allows easy integration of the LXD11K4 into user FPGA designs without the need to acquire expensive and complex JESD204B interface cores. Furthermore the low pin count implementation make sure the card can be used on all Xilinx development boards as well as the Logic-X FPGA FMC carrier boards.

時脈功能

The onboard low noise clock generator ensures easy integration into small single board systems as well as standalone operation. For larger systems it is possible to easily synchronize multiple boards by providing an external reference clock. This is a special feature offered by the onboard clock PLL.


產品規格

Number of analog input channels:4
Front panel IO connector type:SSMC/ MMCX
Front panel IO type:ADC
Form Factor:FMC - Low pin count (LPC)

Analog input specification

Input coupling:AC/ DC coupling 
Input maximum sample rate:310 Msps
Input number of bits:16 bits resolution 
Impedance:50 Ω 
Input bandwidth AC coupled:10 MHz - 400 MHz
Input bandwidth DC coupled:DC - 200 MHz
Input AC full scale power:+ 6 dBm
Input DC full scale power:+ 12 dBm

Legislation and Environmental 

Supported operating temperature (2選1):Commercial (0°C ~ 70°C) / Industrial (-40°C ~ 85°C) 
Ruggedization:standard Commercial Air-cooled and Rugged Conduction- cooled
ROHS Compliant:Yes - RoHS Phthalates Compliant 
SVHC:Product contains no SVHC
Country of origin:the Netherlands (Europe) (荷蘭製造生產)
ECCN :3A002.h.1.e

Conformal Coating (2選1):No coating / Mil-I-46058-C Confomal Coating

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LXD10K0 │ 12 位元低延遲寬頻 ADC │ 電子戰 雷達 DRFM 醫療 電信系統

產品應用

  • Electronic Warfare systems
  • Radar waveform generators and receivers
  • Advanced digital radio frequency memory (DRFM) systems
  • Medical systems
  • Telecommunicaton systems

以5.4 Gsps 解析度進行 12 位元解析度的低延遲數據擷取

With the LXD10K0 Logic-X provides a unique analog interface product that is based on the 12-bits low latency wide bandwidth ADC (EV12AS350A) and from Teledyne E2V. Multi card synchronization is supported thanks to a flexible clock tree and external synchronization trigger input.

類比輸入

With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V (EV12AS350A) the LXD30000 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns) on its analog input channel. Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz.

12位元

The ADC offers 12-bits resolution further contributing to achieve best in class signal to noise ratios.

低延遲

It is possible to achieve a very low latency from the RF input to the RF output because of the LVDS connectvity to the host carrier. This can be less than 18 ns, depending on the carrier that is used.

時脈功能

The onboard low noise clock generator ensures easy integraton into small single channel systems as well as standalone operaton. For larger systems it is possible to directly provide the sample clock to the front panel SSMC connector or to synchronize the local clock generator to an external reference clock.


產品規格

Number of analog input channels:1
Front panel IO connector type:SSMC
Front panel IO type:ADC
Form Factor:FMC - High pin count (HPC)

Analog input specification

Input coupling:AC coupling 
Input maximum sample rate:5.4 Gsps
Input number of bits:12 bits resolution 
Impedance:50 Ω 
Input bandwidth AC coupled:0.5 MHz - 4.8 MHz
Input AC full scale power:+ 8.5 dBm

Legislation and Environmental 

Supported operating temperature (2選1):Commercial (0°C ~ 70°C) / Industrial (-40°C ~ 85°C) 
Ruggedization:standard Commercial Air-cooled and Rugged Conduction- cooled
ROHS Compliant:Yes - RoHS Phthalates Compliant 
SVHC:Product contains no SVHC
Country of origin:the Netherlands (Europe) (荷蘭製造生產)
ECCN :3A002.h.1.c

Conformal Coating (2選1):No coating / Mil-I-46058-C Confomal Coating

  產品文件:產品規格表
 
 

LXD30K0 │ 12 位元低延遲寬頻 ADC/ DAC FMC │ 電子戰 雷達應用 DRFM 醫療 電信系統

產品應用

  • Electronic Warfare systems
  • Radar waveform generators and receivers
  • Advanced digital radio frequency memory (DRFM) systems
  • Medical systems
  • Telecommunicaton systems

12位元低延遲寬頻ADC/DAC FMC

With the LXD30K0 Logic-X provides a unique analog interface product that is based on the 12-bits low latency wide bandwidth ADC (EV12AS350A) and DAC  EV12DS460) from Teledyne E2V. Multi card synchronizaton is supported thanks to a flexible clock tree and external synchronization trigger input.

類比輸入

With an analog input stage that has a very wide input bandwidth from 0.5MHz up-to 4.8GHz and the low latency 5.4Gsps ADC from E2V (EV12AS350A) the LXD30K0 delivers unmatched performance with regards to SFDR, close in phase noise and latency (7.2 ns). Sampling at 5.4 Gsps offers an instantaneous bandwidth of 2.7GHz.

類比輸出

Surpassing the analog input, the analog output offers an even lower latency (1.2 ns) using the EV12DS460 DAC device from E2V. The output bandwidth ranges from 0.5MHz to 6GHz and the instantaneous output bandwidth is 1.35GHz.

12位元

Both the ADC and DAC offer 12-bits resolution further contributng to achieve best in class signal to noise ratios.

超低延遲

It is possible to achieve a very low latency from the RF input to the RF output because of the LVDS connectvity to the host carrier. This can be less than 18 ns, depending on the carrier that is used.

時脈功能

The onboard low noise clock generator ensures easy integraton into small single channel systems as well as standalone operaton. For larger systems it is possible to directly provide the sample clock to the front panel SSMC connector or to synchronize the local clock generator to an external reference clock.


產品規格

Number of analog input channels:1
Number of analog input channels:1
Front panel IO connector type:SSMC/ MMCX
Front panel IO type:ADC/ DAC
Form Factor:FMC - High pin count (HPC)

Analog input specification

Input coupling:AC coupled
Input maximum sample rate:5.4 Gsps
Input number of bits:12 bits resolution
Impedance:50 Ω
Input bandwidth AC coupled:0.5 MHz - 4.8 GHz
Input AC full scale power:+8.5 dBm

Analog output specification

Output coupling:AC coupled
Output maximum sample rate:2.7 Gsps (5.4 GHz update rate) 
Output number of bits:12 bits resolution 
Impedance:50 Ω
Output impedance AC coupled:0.5 MHz - 6 MHz 
Output AC full scale power:-5 dBm (NRZ mode) 

Legislation and Environmental 

Supported operating temperature (2選1):Commercial (0°C ~ 70°C) / Industrial (-40°C ~ 85°C) 
Ruggedization:standard Commercial Air-cooled and Rugged Conduction- cooled
ROHS Compliant:Yes - RoHS Phthalates Compliant 
SVHC:Product contains no SVHC
Country of origin:the Netherlands (Europe) (荷蘭製造生產)
ECCN :3A002.h.1.c

Conformal Coating (2選1):No coating / Mil-I-46058-C Confomal Coating

 


  產品文件:產品規格表

 

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